Programmable logic based on microcontroller-based design on the fast lane

This article briefly discusses the basics of programmable logic, FPGA architecture, FPGA implementation technology, processor cores, SoPC advantages, and processor flexibility in automotive electronics.

This article briefly discusses the basics of programmable logic, FPGA architecture, FPGA implementation technology, processor cores, SoPC advantages, and processor flexibility in automotive electronics.

Large-scale programmable logic devices, such as field programmable gate arrays (FPGA) and complex programmable logic devices (CPLD), have developed rapidly since they were first introduced as glue logic substitutes and ASIC prototype devices decades ago. Embedded accelerators and microprocessors make them strong candidates for many applications that were once considered the exclusive domain of DSP and ASSP. Once designers understand the basics of FPGA and CPLD architecture, they can improve the performance, efficiency, and design cycle of many designs.

Programmable logic has a long history of development before it reaches the most advanced form in FPGAs and CPLDs. The architectural difference between these two technologies is indicated by the name itself. The structure of FPGA is very similar to gate array ASIC, in fact, it was originally used for ASIC prototyping. CPLD is a network of programmable logic elements, which can be connected to create a larger system.

Basics of Programmable Logic

By reviewing the features of Programmable Array Logic (PAL), you can quickly understand the basic configuration ideas of FPGA and CPLD. This feature starts with a wide range of programmable and planes for AND operations on inputs. The OR plane is fixed, which limits the number of items that can be ORed. Basic logic devices have been added, such as multiplexers, XORs, and latches, as well as clock components such as flip-flops.

This combination of circuit elements enables designers to implement a large number of logic functions, including the clock sequential logic required by the state machine. PAL is a very fast device, it replaces most of the standard logic in the previous generation of designs. Figure 1 shows a basic PAL in which a programmable element (shown as a fuse) connects both the true input and the complementary input to the AND gate. AND gates, also called product terms, are ORed together to form a product sum logic array.

Programmable logic based on microcontroller-based design on the fast lane

Simplify PAL

CPLD and FPGA create a pleasant and scalable medium between PAL and ASIC gate array. CPLD is as fast as PAL, but more complicated. FPGAs approach the complexity of gate arrays and are programmable.

CPLD architecture

Programmable logic based on microcontroller-based design on the fast lane

Simplified CPLD architecture

FPGA architecture

FPGA architecture is similar to ASIC, but completely different from CPLD. The general FPGA architecture consists of a set of configurable logic blocks (CLB), I/O pads, and programmable interconnects, as shown in Figure 3. Add a clock circuit to drive the clock signal to each logic block. Arithmetic logic unit, memory and decoder are also typical components.

Programmable logic based on microcontroller-based design on the fast lane

Basic FPGA architecture

FPGA logic is contained in CLB, which contains RAM used to create combinatorial logic functions, also known as look-up table (LUT). It also contains flip-flops for clock storage elements, and multiplexers for routing logic between the block and external resources. The multiplexer is also used for polarity selection and reset and clear input selection.

FPGA implementation technology

FPGAs are traditionally described in terms of the memory technology used to store the logic configuration of the FPGA. There are four types currently in use, each with its advantages and disadvantages: SRAM-based FPGA, SRAM with internal flash memory, flash-based and anti-fuse (also called OTP because they are one-time programmable) .

SRAM-based FPGAs store the configuration of logic cells in static memory organized as an array of latches. Because SRAM is volatile, this type of FPGA must be programmed every time the system is started. There are two basic programming modes:

Master mode, that is, the FPGA reads configuration data from an external source (such as an external flash memory chip).

In Slave mode, the FPGA is configured by an external master device (such as a processor). Usually, this is done through a dedicated configuration interface or using a boundary scan (JTAG) interface.

SRAM-based FPGAs with internal flash memory contain internal flash memory blocks and do not require external non-volatile memory.

A true flash-based FPGA uses flash as the main resource for configuration storage, so external non-volatile memory is not required. Compared with SRAM-based FPGAs, this technology has lower power consumption and is more tolerant of radiation effects.

Anti-fuse (OTP)-based FPGAs are different from the aforementioned technologies because they can only be programmed once. (The anti-fuse device initially does not conduct current, but it can be burned to a conductive state.)

Processor core

Although programmable devices were originally developed as glue logic substitutes, as gate density increased, FPGA and CPLD vendors began to add circuits with dedicated functions to supplement unallocated gates and logic functions. The result is called a system on a programmable chip (SoPC), in which the entire system composed of complex devices such as processors is integrated into a single programmable logic device.

Today, most FPGA and CPLD vendors provide product families that provide MCU and other IP core functions. Using the kernel allows system designers to access a familiar set of development tools, operating systems, and optional performance to suit the application.

Chip advantage

There are several compelling reasons to consider using SoPC with MCU functionality. The first is to recognize the hidden costs of using a dedicated MCU. For example, if the components do not have the correct combination of functions, external logic and software must be developed to fill the functional loopholes. Although MCU vendors provide devices with special features to suit specific applications, these chips do not consider dynamic market conditions that may be required (for example, new interfaces or peripherals in a short period of time).

Example: processor flexibility in automotive electronics

Automobiles have unlimited demand for integrated MCUs. Every major system—engine control, braking, chassis, and entertainment systems, to name just three—has at least one. Traditionally, requirements have been met by application-specific MCUs, but as the number of applications (and MCU variants) increases, this strategy is being questioned. Automakers are looking for more flexible and easier-to-customize solutions. In some cases, FPGAs are the answer.

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