“Capacitance and its parasitic effects
Capacitance and its parasitic effects
Figure 1 shows the actual capacitor model. The resistance RP represents the insulation resistance or leakage and is connected in parallel with the nominal capacitance (C). The second resistor RS (Equivalent Series Resistance or ESR) is connected in series with the capacitor and represents the resistance of the capacitor pin and the capacitor plate.
Figure 1. The actual capacitance equivalent circuit including parasitic elements
The inductance L (equivalent series inductance or ESL) represents the inductance of the pin and the capacitor plate. Finally, the resistance RDA and the capacitor CDA together form a simplified model of the phenomenon called dielectric absorption (DA). When capacitors are used in precision applications such as sample-and-hold amplifiers (SHA), DA can cause errors. But in decoupling applications, the DA of the capacitor is not important and should be ignored.
Figure 2 shows the frequency response of different types of 100 μF capacitors. Theoretically, the impedance of an ideal capacitor decreases monotonically as the frequency increases. In actual operation, ESR flattens the impedance curve. As the frequency continues to increase, the impedance starts to rise due to the ESL of the capacitor. The position and width of the “knee” will vary with the capacitor structure, dielectric and capacitance value. Therefore, in decoupling applications, you can often see larger value capacitors in parallel with smaller value capacitors. Smaller value capacitors usually have lower ESL and still behave like a capacitor at higher frequencies. The frequency range covered by the parallel combination of capacitors is wider than the frequency range of any capacitor in the combination.
The self-resonant frequency of a capacitor is the frequency at which the capacitive reactance (1/ωC) is equal to the ESL reactance (ωESL). Solving this resonant frequency equation yields the following equation:
The impedance curves of all capacitors are similar to the general shape shown in the figure. Although the actual graphs are different, they are roughly the same in shape. The minimum impedance is determined by the ESR, and the high frequency region is determined by the ESL, and the latter is largely affected by the package style.
Decoupling capacitor type
The electrolytic capacitor series has a wide value range, high capacitance-to-volume ratio and wide operating voltage, and is an excellent cost-effective low-frequency filter component. This series includes general-purpose aluminum electrolytic switch types, offering operating voltages below 10 V up to about 500 V, with sizes ranging from 1 μF to thousands of μF (and proportional external dimensions).
All electrolytic capacitors have polarity, so they cannot withstand reverse bias voltages above about 1 V without causing damage. Such components have relatively high leakage current (may be tens of μA), and the specific leakage current depends to a large extent on the design, electrical size, rated voltage and applied voltage of the specific series. However, leakage current cannot be the main factor in basic decoupling applications.
General purpose aluminum electrolytic capacitors are not recommended for most decoupling applications. However, a subset of aluminum electrolytic capacitors is the “switch type”, which is designed and specified to handle high pulse currents at frequencies up to hundreds of kHz with very low loss. This type of capacitor is directly comparable to solid tantalum capacitors in high-frequency filtering applications, and has a wider range of available values.
Solid tantalum electrolytic capacitors are generally limited to voltages of 50 V or lower, and the capacitance is 500 μF or lower. For a given size, tantalum capacitors exhibit a higher capacitance-to-volume ratio than aluminum switch electrolytic capacitors, and have a higher frequency range and lower ESR. Tantalum capacitors are generally more expensive than aluminum electrolytic capacitors. For surge and ripple current, the application must be handled carefully.
Recently, high-performance aluminum electrolytic capacitors using organic or polymer electrolytes have also come out. These capacitor series have slightly lower ESR and higher frequency range than other electrolytic types, and also have the smallest drop in low temperature ESR. Such components use aluminum polymer, special polymer, POSCAP? and OS-CON? labels.
Ceramic or multilayer ceramics (MLCC) have compact size and low loss characteristics, and are usually the preferred capacitor material above several MHz. However, ceramic dielectric properties vary greatly. For power supply decoupling applications, some types are better than others. When using X7R’s high-K dielectric formula, the value of ceramic dielectric capacitors can reach up to several μF. The rated voltage of the Z5U and Y5V models can reach up to 200 V. The capacitance change of X7R type under DC bias voltage is smaller than that of Z5U and Y5V type, so it is a better choice.
The NP0 (also known as COG) type uses a formula with a lower dielectric constant, with a nominal zero TC and low voltage coefficient (different from the more unstable high-K type). The available value for the NP0 type is limited to 0.1 μF or lower, and 0.01 μF is a more practical upper limit.
The extremely low inductance design of multilayer ceramic (MLCC) surface mount capacitors can provide near-optimal RF bypassing, so they are increasingly used for bypassing and filtering at frequencies of 10 MHz or higher. The operating frequency range of smaller ceramic chip capacitors can reach 1 GHz. For these and other capacitors in high-frequency applications, by choosing a capacitor with a self-resonant frequency higher than the highest target frequency, you can ensure that the useful value meets your needs.
Film-type capacitors generally use wire winding, which increases inductance, so they are not suitable for power supply decoupling applications. This type is more commonly used in audio applications, where very low capacitance and voltage coefficient are required.
Finally, be sure to choose a capacitor with a breakdown voltage that is at least twice the power supply voltage, otherwise accidents may occur when the circuit is powered on.
The impact of poor decoupling technology on performance
Figure 3 shows the impulse response of the 1.5 GHz high-speed current feedback operational amplifier AD8000. Both oscilloscope pictures are obtained using the evaluation board. The curve on the left shows the response for correct decoupling, and the curve on the right shows the response after removing the decoupling capacitors on the same circuit board. In both cases, the output load is 100 Ω.
Figure 3. The effect of decoupling on the performance of AD8000 operational amplifiers
The oscilloscope diagram shows that when there is no decoupling, the output exhibits a bad ringing oscillation, which is mainly due to the deviation of the power supply voltage with the change of the load current.
Now examine the impact of correct and incorrect decoupling on the 14-bit, 105 MSPS/125 MSPS high-performance data converter ADCAD9445. Although converters usually do not have PSRR specifications, correct decoupling is still very important. Figure 4 shows the FFT output of a properly designed circuit. In this case, we use the AD9445 evaluation board-note that the spectrum is very clean.
Figure 4: FFT diagram of the AD9445 evaluation board when properly decoupled
The pin arrangement of AD9445 is shown as in Fig. 4. Please note that there are multiple power and ground pins. This is to reduce the power supply impedance (parallel pins).
Figure 5. AD9445 pinout diagram
There are 33 analog power pins. 18 pins are connected to AVDD1 (voltage is 3.3 V ± 5%), and 15 pins are connected to AVDD2 (voltage is 5 V ± 5%). There are 4 DVDD (voltage 5 V ± 5%) pins. On the evaluation board used in this experiment, each pin has a 0.1 μF ceramic decoupling capacitor. In addition, there are several 10 μF electrolytic capacitors along the power supply traces.
Figure 6 shows the spectrum after removing the decoupling capacitor from the analog power supply. Please note that high-frequency spurious signals have increased, and some intermodulation products (low-frequency components) have also appeared. The signal SNR has been significantly reduced. The only difference between this picture and the above picture is the removal of the decoupling capacitor.
Figure 7 shows the result of removing the decoupling capacitor from the digital power supply. Note that the spurs have also increased. In addition, attention should be paid to the frequency distribution of strays. These spurs not only appear at high frequencies, but also span the entire spectrum. This experiment was carried out using the LVDS version of the converter. It is conceivable that the CMOS version will be worse because the noise of LVDS is lower than that of saturated CMOS logic.
Figure 7. The SNR graph of the AD9445 evaluation board after removing the decoupling capacitors from the digital power supply
These experiments show that removing most or all of the decoupling capacitors will cause performance degradation, but it is difficult to analyze or predict the effect of removing one or two decoupling capacitors. When in doubt, the best strategy is to put a capacitor. Although the cost increases slightly, it eliminates the risk of performance degradation, which is usually worthwhile.
There are many more things about decoupling, but we hope that everyone has a general understanding of its role in achieving the desired performance of the system. The basic outlines in these articles explain the key concepts. For details, see other references. Another valuable resource for guidance is the manufacturer’s evaluation board. Most IC products have corresponding evaluation boards. In many cases, you only need to download the schematic, layout, and component list, and then learn what has been done about decoupling, without actually buying an evaluation board. You can be confident that these evaluation boards are designed with great care to achieve the best performance of the IC under evaluation.
Now we end this article with the traditional circuit test shown in Figure 8.
Figure 8. Test: Three ideal capacitors are charged to the voltage shown. After closing S1 first, then closing S2, what is the final voltage of the group of capacitors? If the sequence of closing the switches is reversed, what is the final voltage of the group of capacitors?