I2C bus-related common problems, these devices can be paid attention to

The Inter-Integrated Circuit Bus (I2C) is a synchronous serial data communication bus, a very common protocol used to connect microcontrollers and their peripheral devices. This kind of bus technology, which is almost always encountered in every engineer’s design, may always bring no big or no small challenge to everyone’s design because of various inadvertent problems. For example, general devices provide open-drain output, which means that they can only be pulled down slightly. This means that while achieving two-way communication, it also means that a pull-up is required to achieve a high-level state on the bus. How to determine the size of the pull-up? This is a question that designers often ask.

The Inter-Integrated Circuit Bus (I2C) is a synchronous serial data communication bus, a very common protocol used to connect microcontrollers and their peripheral devices. This kind of bus technology, which is almost always encountered in every engineer’s design, may always bring no big or no small challenge to everyone’s design because of various inadvertent problems. For example, general devices provide open-drain output, which means that they can only be pulled down slightly. This means that while achieving two-way communication, it also means that a pull-up is required to achieve a high-level state on the bus. How to determine the size of the pull-up? This is a question that designers often ask.

I found a lot of relevant information on the Internet, but finally found that all the electrical specifications that need to be met have been listed in the following table. After determining the data rate of the application plan to run, check the specification table to find the required rise time. If you don’t know the capacitance of the bus, you can estimate a value, such as 30 picofarads per device, and then adjust it accordingly. But the pull-up current and the total capacitance on the bus have limits, so after setting up the circuit, I2C packets are used for communication. Every experienced hardware design engineer can probably put forward many similar problems that he has encountered. Here may as well give design suggestions based on the common problems of several engineers.

I2C bus-related common problems, these devices can be paid attention to

How to reduce power consumption using I2C package for communication?

If you consider the I2C signal in more detail, a pull-up resistor is generally used to obtain a high-level signal, and a resistor can be selected for the rising edge. However, when the signal is at a low level, the pull-up resistor is only consuming power, so how to reduce this power consumption?

ADUM1250 is an I2C electrical isolator from ADI. Let’s compare the transmitter and pull-up resistor of ADUM1250, and then compare it with the LTC4311 rise time accelerometer added to the circuit. As shown in the figure below, separate the device power supply in the circuit from the bus power supply, and use different power supplies to see where the power is consumed.

I2C bus-related common problems, these devices can be paid attention to

The following table is the test result. There is a 2K ohm pull-up resistor, the rise time is good, but 2.6 mA current flows through the pull-up resistor. How to save power consumption? According to the power budget, the pull-up resistor is adjusted to 10 K, but in this case, the rise time will be problematic. It can be assumed that the RC is known, but the power budget needs to be set. Therefore, the rise time is accelerated. When the RTA finds that there is a rising edge in the voltage threshold and the slew rate is the lowest, it will inject current to speed up the rise time, but will not pull it up significantly. It should be noted here that the rise time is within the required range.

Let’s take a look at how much current the RTA consumes. The LTC4311 and the pull-up resistor are connected to the same power supply. It can be seen that the current consumption is much lower than that of the 2K pull-up. The real advantage is that the RTA remains idle for the rest of the waveform. LTC4311 only consumes about 25 microamperes of current, so a weaker pull-up resistor can be used, but still allows the rise time to meet the required I2C specifications. This makes LTC4311 a very interesting device that can be added to mobile applications or battery-powered applications.

I2C bus-related common problems, these devices can be paid attention to

In addition, it can also bring another advantage to the RTA circuit. The more current the open-drain device is required to synchronize, the higher the low level on the bus, because there is a voltage drop across the open-drain. Therefore, when the low level increases, the noise margin will be lower. Therefore, the RTA circuit helps to reduce the voltage drop across the open-drain output and maintain a low level. This is especially useful when the power supply voltage is very low. LTC4311 can support the lowest 1.8V bus wire, so the RTA in the above circuit helps to meet the required rise time, which consumes power and keeps VOL low.

The LTC4311 is a dual-channel I2C active pull-up accelerator designed to increase data transmission speed and reliability under bus load conditions far exceeding the 400pF I2C specification limit. A system with multiple devices connected to the same bus may exhibit a large bus capacitance that is much higher than the 400pF I2C performance specification. Capacitive loading causes a slower rise time, which may affect data reliability and specify the actual maximum speed of the bus. The LTC4311 alleviates these problems by using an increased pull-up current during the rising transition of the bus and disabling the current source during the falling transition and logic low and logic high to improve low-state noise tolerance.

Bus buffer, to solve the problem of uninterrupted joining the active I2C bus

The system in the picture below has a backplane, which may be a server or other, with many cards inserted on it. For low-speed communication, I2C is very suitable for communicating with these cards. But for the bus with this structure, it is necessary to adjust the pull-up resistance to obtain a fixed capacitance. What if there is no fixed number of cards? Or, what if you pull out a card and replace it with a card with different electrical characteristics? Some pull-up resistors can be allocated by design, but there are still restrictions on how much current can be synchronized. Therefore, it can be estimated that each device adds 30 picofarads to the bus. If you add a connector to the card terminal, the line on the backplane or card will be very long, and the capacitor budget will be used up soon. Therefore, it is recommended to add bus buffers at the card terminal. These bus buffers will isolate the capacitors to each sub-module. part.

I2C bus-related common problems, these devices can be paid attention to

If in the application, the card is inserted when the I2C bus is active, then it should be inserted in an appropriate way. So basically, we want to minimize the possibility of data confusion or data loss, or even bus lock. Many bus buffers have a precharge function. So before the bus connection, it can raise the voltage of the bus pin to about 1V, which is equivalent to a 200Ω series resistance. The effect of this is that when the new bus segment makes mechanical contact, the 1V pre-charge will minimize the interference to the signal.

In addition, if you do not want electrical interference when the bus buffer or bus segment is not powered on, you also do not want to feed the bus voltage rail. The bus buffer can solve these problems. The output stage of the I2C bus buffer is an open-drain pull-down resistor in the end channel, and their gates are grounded until a series of start-up conditions are met. Therefore, voltage feedback is not allowed at power-up, and the capacitance at the remote end of the buffer is never visible.

The bus buffer is a common system structure. LTC4330 is the latest product in the ADI bus buffer series. It will isolate the bus capacitance, use RTA, disconnect and restore the stuck bus, and perform pre-charging, but it still uses 3× 3mm package. The maximum operating temperature of this product can reach 125°C, and the maximum operating temperature of the remaining bus buffers is 85°C. Other bus buffers support 400KHz, LTC4330 supports up to 1MHz bus, and also provides bidirectional support for the third channel, so this is very useful for PM bus communication.

In addition, the bus buffer has a VOL offset. But LTC4330 does not use VOL offset, both ends of which are fixed VOL levels. Therefore, if the application uses the buffer in a serial manner, the performance of the LTC4330 will be very good, because the designer does not need to worry about the VOL offset accumulation problem. In addition, LTC4330 also provides extremely reliable system-level ESD protection, which is a very useful feature, especially when the buffer is located on the card terminal, not only can the bus buffer implement logic level conversion, but also ground level conversion .

Although the LTC4330 is not an electrical isolator, it can be used in applications that only need to offset the level of the reference voltage. Sometimes, the isolator will serve this purpose. Just like the 48V system, it can offset the reference voltage level and communicate between the two ends, and if these grounds move relative to each other, then the LTC4330 also has very good CMCI performance.

I2C bus-related common problems, these devices can be paid attention to

Typical application of ±150V I2C bus buffer: -48V reference voltage source level offset, and provide third channel support

How to control the traffic on I2C?

The bus buffer multiplexer can not only isolate the bus capacitance to each segment, but also operate the bus segments at different voltage levels if necessary. For applications that require I2C bus fan-out and ATI’s I2C bus buffer box contains 2 and 4 channels, they will perform very well. Another useful feature is that sometimes I2C devices use fixed hard-wired addresses, but when more such devices are needed, the number exceeds the number of available addresses. At this time, multiplexers can be used to obtain redundant addresses, which means Therefore, the designer can control which segment of the bus the information is sent to. Different methods can be used to control I2C traffic, such as LTC4305 and LTC4306, or other devices with control circuits, such as LTC4312 and LTC4314, using multiplexers and control circuits, they can implement conversion.

Use a multiplexer to control the flow on I2C, and use a bus buffer to achieve the same effect. But by using the address converter, there is no cost to switch the flow, and there is no need to use control pins or any additional I2C commands. Or use devices such as LTC4316 to modify the 7-bit address communication. Therefore, when using slaves with multiplexed addresses, they are unique from the perspective of the master.

Summarize

ADI’s I2C solution series supports hot-swappable, two-wire bidirectional bus buffers, which can insert I/O cards into a live backplane without damaging the data and clock buses. I2C accelerometers can improve bus conversion characteristics and support multiple device connections or longer and more capacitive interconnections without affecting the slew rate or bus performance. In addition, ADI’s software-programmable and pin-selectable I2C multiplexer can help solve I2C address limitations, increase fan-in or fan-out capabilities, and integrate bus buffers and rise time accelerometers for an all-in-one solution. The resistance configurable I2C address converter can be configured with more than 100 unique slave addresses, so that multiple slave devices with the same address can coexist on the same bus.

The Links:   BSM300GA12DA11S EL640480-RD4

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