“This application note introduces the use of SH7216’s multi-function timer pulse unit 2 (MTU2) to skip the ADC activation during complementary PWM. It introduces the specifications, function overview, and operation and setting procedures of the sample program.
This application note introduces the use of SH7216’s multi-function timer pulse unit 2 (MTU2) to skip the ADC activation during complementary PWM. It introduces the specifications, function overview, and operation and setting procedures of the sample program.
The sample program activates the A/D converter at a user-defined timing during the output of complementary PWM waveform 3 phases from channel 3 and 4 (ch3 and ch4) of MTU2, and performs multiple jumps in the activation count. The basic specifications for this simple task are listed below.
MTU ch3 and ch4 output three-phase complementary PWM waveforms with dead time, and the output on TIOC3A is switched synchronously with the cycle.
When TCNT_4 counts up, the A/D converter is activated when the comparison between TCNT_4 and TADCORA_4 matches.
The A/D converter activation count is associated with the ch3 compare match interrupt (TGIA3) skip, and the skip is executed twice.
A/D converter works in single mode
When the A/D conversion end interrupt occurs, the A/D conversion result is stored in the on-chip RAM
Analog-to-digital converter (ADC)
Multifunction timer pulse unit 2 (MTU2)
Clock Pulse Generator (CPG)
Pin Function Controller (PFC)
Interrupt Controller (INTC)
C internal clock: 200 MHz
C bus clock: 50 MHz
C peripheral clock: 50 MHz
C MTU2S clock: 100 MHz
C AD clock: 50 MHz
Integrated development environment: Renesas Electronics High Performance Embedded Workshop Ver.4.07.00
C++ compiler: Renesas Electronics SuperH RISC engine family C/C++ compiler package, Ver.9.03.00 Release02
Block diagram of A/D conversion using MTU2
In the sample program, A/D module 0 is activated by MTU2 when the A/D conversion start trigger (TRG4AN), and the A/D conversion is performed in the single-cycle scan mode. Figure 2 is a block diagram of the A/D0 module, and its function is described as follows.
A/D module block diagram
A/D data register 0 (ADDR0) is a 16-bit read-only register used to store the conversion result from the analog input channel (AN0). The converted data is stored in the 15th to 6th bits of ADDR, and the value of the lower 6 bits is always 0.
A/D control register 0 (ADCR_0) controls A/D conversion operation