Digital equation using analog RC low-pass filter to remove ADC noise signal

The trend in the modern electronics industry is to integrate more functions into the smallest possible form factor. This is no secret. Mobile phones are an example of this. Many manufacturers today integrate MP3 players, digital cameras and even satellite TV functions into mobile phones. In the past few years, the market has achieved tremendous development and is still expanding rapidly.

The trend in the modern electronics industry is to integrate more functions into the smallest possible form factor. This is no secret. Mobile phones are an example of this. Many manufacturers today integrate MP3 players, digital cameras and even satellite TV functions into mobile phones. In the past few years, the market has achieved tremendous development and is still expanding rapidly.

The design cycle of these products is usually short, and the test takes longer than the actual design (about 4 months for the design and 6 months for the test). For this reason, designers must carefully select devices to avoid repeated modifications and delays in the final product.

The following will focus on some useful design techniques, short calculations and general evaluation methods to help designers better evaluate.

In the field of portable electronics, designers use their knowledge and judgment to select devices based on multiple factors (size, cost, and performance). But these factors usually need to be weighed, and designers must carefully select components based on the desired end product. Almost like other industries, the portable market, especially the mobile phone market, usually offers both high-end (multi-function) and low-end (cheap) products.

Digital equation using analog RC low-pass filter to remove ADC noise signal

Figure 1: Use multiple operational amplifiers to reduce output noise.

The mobile phone motherboard includes different components, such as operational amplifiers, audio amplifiers and preamplifiers, data converters, and ASICs. Before choosing an operational amplifier, the designer must consider packaging options and whether a smaller package will degrade performance. Although small packages are popular in the field of portable products, small packages may cause troubles and problems for designers. Operational amplifiers in plastic packages, such as SC70, often cannot achieve the same performance as the corresponding products in SOIC or MSOP packages. In the microchip-scale package (CSP) (which is essentially a bare chip), the input bias current may be offset by hundreds of orders of magnitude when exposed to light. This package form is also prone to cracks during assembly.

Which parameters are important?

In battery-powered applications, especially PDAs and mobile phones, because the battery voltage will drop with interference, an operational amplifier with good PSRR performance (~80dB) should be selected. In addition, pay attention to the high-gain configuration, because the noise coupled to the op amp will cause the noise level to rise. The selection of the resistor is also very critical, a larger resistance will produce higher noise. Can designers use 4? Estimate Johnson noise or resistance noise, where the unit of R is K ohms, so a 100K ohm resistor produces about 40nV noise!

If multiple operational amplifiers are used, one way to reduce noise is to use the scheme shown in Figure 1. This method can reduce the output noise by a factor, where n is the number of amplifiers used. For LMV651, the output noise will be reduced to approximately 12nV/. In addition, the designer must consider limiting the bandwidth to make noise: The designer can use a small capacitor in parallel with the feedback resistor to reduce noise.

The choice of operational amplifier also depends on other devices. A common challenge faced by designers is choosing the right operational amplifier for the analog-to-digital converter (ADC). Although there are many types of data converters on the market, the matching rules between operational amplifiers and analog-to-digital converters are different, and designers must carefully consider certain criteria before making a choice.

Digital equation using analog RC low-pass filter to remove ADC noise signal

Figure 2: A simple low-pass filter is used at the output of the operational amplifier.

A rough look at the data sheets of the two devices will provide useful information, but it is not enough. First, select operational amplifiers and analog-to-digital converters with the same supply voltage. Then choose an operational amplifier with a small THD+N. If you can’t find the distortion data, look at the output impedance: an op amp with a small output impedance usually means a smaller THD. Speed ​​is another parameter that must be considered. Although faster operational amplifier speeds are comfortable to use, some compromise factors must be considered, such as higher power and occasional instability.

According to the ADC selected, the designer should choose an amplifier that is at least 50 times the ADC sampling rate. Conversion rate may also be a limiting factor. Can a designer be based on 2? fVp is calculated, where f is the input signal frequency and Vp is the output swing. For example, a 100mV input signal with a frequency of 400kHz (gain of 10) requires the amplifier’s conversion rate to be at least 2.5V/μs.

Once these basic parameters are determined, the designer must consider the stabilization time, which may be misleading. Most manufacturers specify that the settling time of operational amplifiers is within 0.1% or 0.01% of the specified input voltage. If the design requires a higher level, such as 16 bits, then a parameter in the range of 0.0015% of the full scale is required. One way to solve this problem is to use the following formula to estimate the settling time of the operational amplifier based on the analog-to-digital converter:

Digital equation using analog RC low-pass filter to remove ADC noise signal

Here, N is the number of bits and f is the open-loop bandwidth of the amplifier.

For example, for an operational amplifier with a gain of 10, such as LMV651, when the degree is 12 bits, the settling time is approximately 1.4 μs; when it is 16 bits, the settling time is 1.65 μs. This formula is only an approximate formula and does not take into account the stray capacitance, motherboard inductance or the input capacitance of the analog-to-digital converter, all of which will affect the settling time.

Before making a final choice, one of the important indicators is the noise of the operational amplifier. A higher-noise amplifier will reduce the analog-to-digital converter and bring significant errors to the system. Before starting to calculate the total output noise of the circuit (this may be a very tedious task), first estimate. This way the designer knows whether to continue using the selected amplifier. This estimation involves the combined voltage noise of the op amp in the relevant bandwidth and the gain of the op amp configuration. We can express this formula as:

Digital equation using analog RC low-pass filter to remove ADC noise signal

Here, NG is the noise gain, en is the voltage noise of the operational amplifier, and BW is the closed-loop bandwidth.

In the circuit of Figure 2, a simple low-pass filter is used at the output. In this example, the output noise is the combined noise under the filter bandwidth (calculated as 1/2πRC). If a second-order filter is used, the bandwidth must be multiplied by a factor of 1.05.

Using the above formula and the LMV651 voltage noise density (17nV/), the total output RMS noise of the circuit in Figure 2 under the 100kHz bandwidth (filter bandwidth) is 53.7V. Once the total output noise is estimated, the designer can use the following formula to calculate the signal-to-noise ratio (SNR) of the operational amplifier:

Digital equation using analog RC low-pass filter to remove ADC noise signal

Here, VFS is the full-scale voltage range, and Eout is the operational amplifier noise calculated above. For example, the signal-to-noise ratio generated by a 2.5V signal is 86.4dB.

Then, the designer should calculate the total SNR of the amplifier and analog-to-digital converter according to the following formula:

The SNR of ADC121S021 is 72.3dB, when ADC121S021 is matched with LMV651, the total SNR is 72.1dB. Ignoring the harmonics, the designer can convert the SNR to the equivalent number of bits: ENOB=(SNR-1.76)/6.02, and then determine that only about 0.3dB is lost according to the equivalent number of bits, which is equivalent to 0.03% of the total error.

Since the noise is the integrated noise under a specific bandwidth, it is obvious that the noise is also proportional to the bandwidth. In other words, reducing the bandwidth will reduce noise; expanding the bandwidth will increase noise. If you decide to choose a higher bandwidth filter, the designer should consider choosing a lower noise amplifier. For example, the 10MHz filter in the circuit of Figure 2 produces a total SNR of less than 71dB, resulting in a 0.5 bit loss. But when LMV791 (5.8nV/) is used with the same filter, the SNR is improved to more than 72dB. The designer can improve the system performance simply by choosing a lower noise operational amplifier. However, various trade-off factors related to this must be considered, such as power consumption and package size.

Other specifications to be considered

So far, we have discussed the basic principles and rules for selecting devices for the design, but there are other factors to be considered. For example, for more demanding applications, DC specifications (such as input offset voltage and drift) may be very important.

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