Design of Constant Current Source Based on AD5422 16-bit Serial Input DAC

Analog Devices AD5422 16 bit serial input DAC can be set as voltage output or current output. In order to communicate with the DAC and produce a variable output, a data SERDES (serializer/deserializer) is required. However, if your design requires a constant 4mA output, you can use two flip-flops to set the device, and use a mechanical key switch S1 for testing (Figure 1).

Analog Devices AD5422 16 bit serial input DAC can be set as voltage output or current output. In order to communicate with the DAC and produce a variable output, a data SERDES (serializer/deserializer) is required. However, if your design requires a constant 4mA output, you can use two flip-flops to set the device, and use a mechanical key switch S1 for testing (Figure 1).

Design of Constant Current Source Based on AD5422 16-bit Serial Input DAC

Figure 1 After pressing and releasing S123 times, the DAC produces a 4mA continuous current output

The programming of AD5422 uses 24 bit long words, the upper 8 bits constitute the address of the control register, and the lower 16 bits set the output range of the DAC, the slew rate step length and the slew rate clock (Table 1). Write a 24-bit 0101 to AD5422. .. 01 form, set it at the bottom of the current interval selected at the same time, that is, 4 mA~20 mA on the output current pin (Pin 19). The data of AD5422 internal shift register is shifted into the data register every time the low-high transition of the latch signal (Pin 7). When the switch is pressed and released for the 23rd time after IC1 is powered on, the device interprets this continuously alternating code sequence into a control command. After this sequence, the SCLK signal can remain idle (Figure 2).

Design of Constant Current Source Based on AD5422 16-bit Serial Input DAC

Figure 2 Although the control instruction sequence is at least 23 clocks wide, it can easily generate alternate bit formats

The flip-flop FF1 is configured as a well-known divide-by-2 counter to generate the required alternating sequence. When the key switch is manually pressed and released, an SCLK signal can be generated. A defibrillator must be used here, because the circuit requires a clean SCLK logic signal, and its level conversion does not exceed tens of nanoseconds. FF2 is used as an asynchronous set/reset trigger to eliminate the signal chatter generated by the button.

In order for the circuit to work normally, after the low-high transition of SCLK, the effective low-high transition of the latch signal must occur at least 13 ns. The SN74HC74 level trigger can meet this requirement. The Q output of FF1 in IC2 is connected to the SDIN input of IC1. The level transition of the SDIN input terminal must be preset and maintained for at least 5 ns during the low-high transition of the SCLK signal. From the precision 5V reference of AD5422, the pull-up resistor of the output terminal FAULT (Pin 3) of IC1 and the 5V power supply voltage of IC2 can be obtained. When IC1’s open-drain FAULT output is valid, there will be a slight current surge due to the load in the initial state, when controlling the word clock to IC1, or in a fault state. Fortunately, the output current (Pin 19) has not yet flowed, otherwise overheating conditions or excessive load resistance will destroy the accuracy of this current from the outside. In either case, the external loading of the internal reference source (microampere level not exceeding tens of seconds) will not compromise the accuracy of the reference source.

Table 1 The role of each control command

Design of Constant Current Source Based on AD5422 16-bit Serial Input DAC

By connecting a 100Ω high-precision resistor between the IOUT pin and the ground and generating 23 clock pulses, a 0.400xV voltage on this resistor can be measured, where x≤4, confirming that it is a high-precision constant of 4 mA Current. The actual full-scale error of IC1 is much smaller than its guaranteed worst value of ±0.3% full-scale error (Reference 1).

Therefore, the relative error of the obtained 4 mA current (the value is not greater than 0.1%) must be divided by 4, because the current scale is 20 mA C4 mA = “16” mA. Therefore, in this case, the total range error of the DAC is less than 0.1%/4, or 0.025%. The constant current source constructed with a single-chip DAC can obtain high resolution and negligible temperature sensitivity, can withstand power supply voltage fluctuations, and has high initial accuracy. The current output DAC also has an output resistance of tens of megaohms.

The circuit uses S1 to generate the SCLK signal for testing purposes only. For mobile power applications, a free clock with a frequency of up to 200 kHz can be used. The pull-up resistor of FAULT output and IC2 can be powered from the DVCC pin of AD5422.

The Links:   PM15RHB120 LM641836

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