Baidu joins hands with Synopsys to achieve “make computing smarter”

Synopsys (Synopsys, Inc., NASDAQ: SNPS) announced today that it will continue to deepen cooperation with Baidu (NASDAQ: BIDU) to help realize its vision of “making computing smarter”. Baidu’s artificial intelligence chip “Kunlun” has adopted Synopsys’ full-process solutions.

The previously released Baidu AI chip “Kunlun” is based on advanced deep submicron process technology and can provide 260 TFLOPS performance and 512 GB/s bandwidth at 100W+ power consumption. In addition to having deep learning algorithms, it can also adapt to the computing requirements of terminal scenarios such as natural language processing, large-scale speech recognition, and autonomous driving.

Mr. Ouyang Jian, Chief Architect of Baidu, said: “Baidu has more than 8 years of experience in AI accelerator and processor research and development and large-scale deployment, coupled with Synopsys’ widely recognized and proven full-process solutions, can help us improve the chip General flexibility, computing power and energy efficiency to better cope with the great challenges faced by pervasive AI chip architecture.”

During the development process of “Kunlun”, Synopsys provided it with a complete solution for chip design, including:

·Full-process digital chip design engine—Fusion design platform, which integrates functions such as synthesis, testability design, physical realization and verification, and timing sign-off, and solves the problem of chip design and manufacturing from the application end to the process end. A series of huge challenges came to realize early optimization of algorithms and chips, which helped the project team to shorten the project development cycle by at least 1/3.

Full-process chip verification platform-Verification Continuum, which integrates architecture performance evaluation, static and formal verification, functional simulation, simulation acceleration, etc., provides a unified verification environment for chip verification, thereby achieving higher R&D efficiency.

·Hardware simulation system-ZeBu Server 4, which is much faster than other similar products in the market in terms of speed Before hardware is delivered, to accelerate research and development.

·The PCIe 4.0 IP core with high-performance and high-reliability interface and floating-point computing library assist AI accelerators in fast computing and data transmission, helping “Kunlun” realize the computing requirements of various large-scale terminal scenarios.

Mr. Ge Qun, Chairman and Global Senior Vice President of Synopsys China, said: “In order to strengthen innovation capabilities, more and more system-level companies are beginning to deploy chip R&D. Synopsys is always committed to providing complete chip design solutions. , To provide reliable tools and services for complex chip research and development. Synopsys established a global artificial intelligence laboratory in China three years ago to study the early integration of algorithms and chip technology in artificial intelligence technology. Technology and Methodology The integration of technology allows the chip R&D team to boldly pursue innovative solutions. The active cooperation between Synopsys and Baidu is of great significance. It will promote the development of the future smart industry and chip industry and accelerate the next wave of industrial innovation.”

The Links:   6DI15S-050 SKKH92-16E

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